3D circuit model for 3D IC reliability study

C. Tan, Feifei He
{"title":"3D circuit model for 3D IC reliability study","authors":"C. Tan, Feifei He","doi":"10.1109/ESIME.2009.4938513","DOIUrl":null,"url":null,"abstract":"3D integrated circuit technology is an emerging technology for the near future, and has received tremendous attention in the semiconductor community. With the 3D integrated circuit, the temperature and thermo-mechanical stress in the various parts of the IC are highly dependent on the surrounding materials and their materials properties, including their thermal conductivities, thermal expansivities, Young modulus, poisson ratio etc. Also, the architectural of the 3D IC will also affect the current density, temperature and thermo-mechanical stress distributions in the IC. In view of the above-mentioned, the electrical-thermal-mechanical modeling of integrated circuit can no longer be done with a simple 2D model. The distributions of the current density, temperature and stress are important in determining the reliability of an IC. In this work, we demonstrate a method of converting 2D circuit layout into a 3D model. Simulations under real circuit operating condition are carried out using both Cadence (a circuit simulator) and ANSYS (finite element tool). Limiting our study to the electromigration failure, we compute the current density, temperature and stress distributions of the interconnect layers by considering the heat transfer and Joule heating, and the “weak spot” for electromigration is identified. Layout design can be modified based on the simulation results so as to enhance the 3D circuit interconnect reliability.","PeriodicalId":225582,"journal":{"name":"EuroSimE 2009 - 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"175 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"EuroSimE 2009 - 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESIME.2009.4938513","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18

Abstract

3D integrated circuit technology is an emerging technology for the near future, and has received tremendous attention in the semiconductor community. With the 3D integrated circuit, the temperature and thermo-mechanical stress in the various parts of the IC are highly dependent on the surrounding materials and their materials properties, including their thermal conductivities, thermal expansivities, Young modulus, poisson ratio etc. Also, the architectural of the 3D IC will also affect the current density, temperature and thermo-mechanical stress distributions in the IC. In view of the above-mentioned, the electrical-thermal-mechanical modeling of integrated circuit can no longer be done with a simple 2D model. The distributions of the current density, temperature and stress are important in determining the reliability of an IC. In this work, we demonstrate a method of converting 2D circuit layout into a 3D model. Simulations under real circuit operating condition are carried out using both Cadence (a circuit simulator) and ANSYS (finite element tool). Limiting our study to the electromigration failure, we compute the current density, temperature and stress distributions of the interconnect layers by considering the heat transfer and Joule heating, and the “weak spot” for electromigration is identified. Layout design can be modified based on the simulation results so as to enhance the 3D circuit interconnect reliability.
三维集成电路可靠性研究的三维电路模型
三维集成电路技术是一项新兴的技术,在半导体界受到了极大的关注。在三维集成电路中,集成电路各部分的温度和热机械应力高度依赖于周围材料及其材料性能,包括其导热系数、热膨胀系数、杨氏模量、泊松比等。此外,三维集成电路的结构也会影响集成电路中的电流密度、温度和热机械应力分布。鉴于上述原因,集成电路的电-热-机械建模不能再用简单的二维模型来完成。电流密度、温度和应力的分布对于确定集成电路的可靠性非常重要。在这项工作中,我们展示了一种将2D电路布局转换为3D模型的方法。利用Cadence(电路模拟器)和ANSYS(有限元工具)对实际电路工作状态进行了仿真。将研究局限于电迁移失效,在考虑传热和焦耳加热的情况下,计算了互连层的电流密度、温度和应力分布,并确定了电迁移的“弱点”。可以根据仿真结果修改布局设计,以提高三维电路互连的可靠性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信