Power-aware processor scheduling under average delay constraints

Fan Zhang, S. Chanson
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引用次数: 13

Abstract

In this paper, voltage scaling strategies for scheduling aperiodic tasks under average delay constraints are studied. Dynamic voltage scaling in single processor systems is formulated as a constrained stochastic optimization problem for which the optimal solution can be obtained using a combination of Lagrange relaxation and the value iteration method. For multiprocessor systems, we present a two-phase approach. In the first phase, the speed settings and static workload distribution of the processors are optimized to minimize the total power dissipation. Dynamic voltage scaling techniques are then applied to each individual processor in the second phase. Both homogeneous and heterogeneous systems have been investigated. Based on queueing theory, the proposed algorithms guarantee conformity to the average delay constraint. Moreover, our simulation experiments have shown they are effective for minimizing power consumption.
平均延迟约束下的功耗感知处理器调度
研究了平均时延约束下的非周期任务调度的电压缩放策略。将单处理机系统中的动态电压标度问题表述为一个约束随机优化问题,该问题的最优解可采用拉格朗日松弛法和数值迭代法相结合的方法求解。对于多处理器系统,我们提出了一个两阶段的方法。在第一阶段,优化处理器的速度设置和静态工作负载分配,以最小化总功耗。然后在第二阶段将动态电压缩放技术应用于每个单独的处理器。均相系统和非均相系统都进行了研究。该算法基于排队理论,保证了平均延迟约束的一致性。此外,我们的仿真实验表明,它们可以有效地降低功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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