Architecture and implementation of a single-chip programmable digital television and media processor

Abstract

This paper describes the architecture, functionality and design of TM-2700-a digital television and media processor chip from Philips Semiconductors. The chip not only supports all eighteen digital television picture formats prescribed by the United States Advanced Television Systems Committee (ATSC), from standard-definition to wide-angle high-definition video, but has also the power to handle High-Definition Television (HDTV) video and audio source decoding (high-level MPEG-2 video, AC-3 and ProLogic audio, closed captioning, etc.) as well as the flexibility to process advanced interactive services. TM-2700 is a programmable processor with a very powerful, general-purpose Very Long Instruction Word (VLIW) Central Processing Unit (CPU) core that implements many non-trivial multimedia algorithms, coordinates all on-chip activities, and runs a small real-time operating system. Aided by an array of peripheral devices and high-performance buses, the CPU core facilitates concurrent processing of audio, video, graphics, and communication-data.