A 90 nm CMOS receiver front-end for GSM/GPRS/EDGE

Abstract

A GSM/GPRS/EDGE receiver front-end realized in 90 nm CMOS technology is presented. With a low power of 46 mW, it achieved 31.5 dB gain, 2.1 dB integrated noise figure, 5 dB of noise figure under blocking condition and -9.5 dBm of inband IIP3. The measured LO leakage at the LNA input is 125 dBm. Total active area occupies 1.4 mm/sup 2/.