45nm CMOS platform technology (CMOS6) with high density embedded memories

Abstract

This paper describes the first 45nm Node CMOS technology (CMOS6) with optimized Vdd, EOT and BEOL parameters. For this technology to be applicable from high performance CPU to mobile applications, three sets of core devices are presented which are compatible with 0.069um/sup 2/ trench capacitor DRAM and 0.247um/sup 2/ 6Tr.SRAM embedded memories.