High speed modular multiplier and digital filter for LSI development

Abstract

In order to realize the increased economy and reliability of systems implemented in large chip or full wafer LSI, five requirements must be satisfied: 1. Systems must be organized and partitioned to obtain a high gate-to-logic pin ratio in order to maximize the use of wafer components. 2. Efficient use must be made of standard logic cells more complex than current IC chips. 3. Logic cells must be defined to both facilitate automated routing and to allow automated testing with a restricted number of test points. 4. Discretionary interconnect of logic elements must be eliminated or minimized. 5. Sufficient redundancy must be used to insure reliability, facilitate testing, and allow economical interconnect in view of non-100 percent yields.