Yield Learning for Complex FinFET Defect Mechanisms Based on Volume Scan Diagnosis Results

Abstract

Device complexity is reaching all-time highs with the adoption of high aspect ratio FinFETs created using multi- patterning process technologies. Simultaneously, new product segments such as AI and automotive are being fabricated on such advanced processes. In this dynamic environment, new complex defect modes have challenged manufacturers to ramp and sustain quality and yield at advanced nodes. Process variability of the standard cell introduces new transistor-level defect modes. Meanwhile the cost of traditional failure analysis has continued to skyrocket. How will the industry reduce the defect-rate and ramp yield to meet these aggressive market demands? This article will detail a new breakthrough in the field of scan diagnosis using machine learning. For the first time, cell-internal defects are detected, diagnosed and now resolved with RCD (Root Cause Deconvolution). Experimental FA results will show how RCD is used to build an accurate defect pareto and pick targeted die for FA for faster and cheaper root cause identification.