A memory allocation method for MPU memory protection unit

Abstract

At present, the Memory Protection Unit (MPU) of Cortex-M series processors needs to align the address with the rule of 2n when protecting the memory, but this method will cause memory waste in multi-task memory allocation. Therefore, this paper proposes a method that uses multiple MPU protected regions to concatenate and superimpose to protect a region simultaneously, which effectively reduces the memory waste caused by alignment. The experimental results show that, compared with using a single MPU protected region, using four regions for concatenation and superposition can reduce the memory waste by 63%, and effectively improve the memory utilization.