Analysis of Crosstalk Effects on Mixed-Signal CMOS ICs with Different Mounting Technologies

Abstract

This paper presents an approach for analysis of crosstalk effects due to current pulses drawn from voltage supplies in mixed analog-digital CMOS integrated circuits. A test chip has been integrated and mounted in different ways, in order to compare measurements on chips mounted in package and mounted on board. The chip has been extensively simulated, using a realistic model of on-chip and off-chip parasitics, to study what happens on the analog section when digital switching noise is injected. Simulations results indicate that disturbances due to switching currents in digital blocks propagate through interconnection parasitics, and affect analog voltages, degrading circuit performance. Therefore, reduction of interconnection parasitics is essential in mixed-signal high-frequency circuits, such as radio-frequency front-ends. Measurements confirm simulation results