Low-Cost FPGA Based Emulator for Spacecraft Power Systems Hardware in Loop testing

Abstract

During the design phase of various modules of a spacecraft power system, it is not possible to carry out complete closed-loop tests to fully validate the overall power systems performance incorporating the new designs due to the non-availability of the other hardware comprising of the rest of the power systems and the elaborate test setup that includes the power simulators. The proposed idea is to use low-cost rewritable FPGA based evaluation kits as emulators that mimic the power systems hardware and power simulators. These emulators are programmed with models of the actual hardware to generate the required inputs for the Unit Under Test (UUT) and respond like the real hardware in response to the outputs from the UUT. Thus, a closed-loop test is facilitated without the need for elaborate and costly test setup. The challenge is developing a program to closely emulate the real hardware. Various case studies are discussed to show the different emulators already developed and under development.