A Tunable Input-Impedance Matching Approach for Long-term Degradation effects of Power Amplifier

Abstract

This paper presents a simple approach in the design of a CMOS-based power amplifier (PA) which mitigates the implications of the aging of the transistors involved in the circuit. Using 45nm-RFSOI PDK we first design and simulate a PA. Next, we use the Relxpert simulation tool to simulate the long-term degradation behavior of this PA. We investigate the device-level causes of long-term degradation, accounting for both DC and RF stress. Based on our investigations, we propose an approach which relies on tuning of the input-impedance matching network, using two varactors in this network to mitigate the effect of transistors aging on the PA’s performance.