A low power CMOS Voltage Controlled Oscillator in 65 nm technology

Abstract

Wireless device portability and power efficiency are the two major challenges in modern device modeling. Voltage Controlled Oscillator (VCO) is one the most essential circuit used in wireless systems. A new three stage VCO design in 65nm technology is proposed in this paper and is compared with previous best Current starved VCO design on the basis of on-chip area utilization and power consumption. The measured tuning range of the proposed VCO design is 0.83 to 3.77 GHz and it is around 30-33% energy efficient than the previous best design. The new proposed VCO design uses 67.65 μm2 area which is 40.75% less than the chip area required for the fabrication of current starved VCO design.