Device Simulation of P-InAlN-Gate AlGaN/GaN high electron mobility transistor

N. Shrestha, Yueh-Chin Lin, Han-Tung Chang, Yiming Li, E. Chang
{"title":"Device Simulation of P-InAlN-Gate AlGaN/GaN high electron mobility transistor","authors":"N. Shrestha, Yueh-Chin Lin, Han-Tung Chang, Yiming Li, E. Chang","doi":"10.1109/IWCE.2014.6865876","DOIUrl":null,"url":null,"abstract":"Enhancement mode AlGaN/GaN high electron mobility transistor with p-InAlN gate is designed and successfully studied its electrical properties. Threshold voltage of the device is 1.9 V, which is required magnitude of threshold voltage for real device. Similarly, the maximum drain current is 520 mA/mm and trasconductance is 183 mS/mm, which is the record estimation for enhancement-mode (e-mode) device with recorded threshold voltage. P-InAlN layer injects hole to the barrier at higher gate voltage and results in comparatively larger drain current. Selective area etching and re-grow AlInN causes thin barrier layer beneath the gate. This recess like p-InAlN structure can reduce the concentration of 2DEG; and thus results the high magnitude of threshold voltage.","PeriodicalId":168149,"journal":{"name":"2014 International Workshop on Computational Electronics (IWCE)","volume":"205 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Workshop on Computational Electronics (IWCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWCE.2014.6865876","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

Enhancement mode AlGaN/GaN high electron mobility transistor with p-InAlN gate is designed and successfully studied its electrical properties. Threshold voltage of the device is 1.9 V, which is required magnitude of threshold voltage for real device. Similarly, the maximum drain current is 520 mA/mm and trasconductance is 183 mS/mm, which is the record estimation for enhancement-mode (e-mode) device with recorded threshold voltage. P-InAlN layer injects hole to the barrier at higher gate voltage and results in comparatively larger drain current. Selective area etching and re-grow AlInN causes thin barrier layer beneath the gate. This recess like p-InAlN structure can reduce the concentration of 2DEG; and thus results the high magnitude of threshold voltage.
p - inaln栅极AlGaN/GaN高电子迁移率晶体管器件仿真
设计了p-InAlN栅增强型AlGaN/GaN高电子迁移率晶体管,并对其电学性能进行了研究。器件的阈值电压为1.9 V,为实际器件所需的阈值电压幅度。同样,最大漏极电流为520 mA/mm,跨导为183 mS/mm,这是具有记录阈值电压的增强模式(e模式)器件的记录估计。P-InAlN层在较高的栅极电压下给势垒注入空穴,导致相对较大的漏极电流。选择性区域蚀刻和再生长alin在栅极下形成薄的势垒层。这种隐窝状p-InAlN结构可以降低2DEG的浓度;从而产生了高幅度的阈值电压。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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