{"title":"Low voltage techniques for high speed digital bipolar circuits","authors":"B. Razavi, Y. Ota, R. Swartz","doi":"10.1109/VLSIC.1993.920525","DOIUrl":null,"url":null,"abstract":"This paper describes design techniques for multi-GHz digital bipolar circuits that operate with supply voltages as low as 1.5 V. Examples include a multiplexer (MUX), a latch, two exclusive OR (XOR) gates, and a buffer/level shifter, circuits that typically employ stacked differential pairs in conventional ECL and hence do not easily lend themselves to low voltage operation. When implemented in a 1.5 /spl mu/m, 12-GHz bipolar technology, these circuits exhibit a speed comparable with that of their 1.5 V CMOS counterparts designed in a 0.5 /spl mu/m process with a threshold voltage of 0.5 V. These results suggest that, although V/sub BE/ of bipolar transistors does not scale as easily as the threshold voltage of MOS devices, the large bipolar transconductance can be advantageous even in 1.5 V systems. In order to ensure reliable operation, the circuits described herein employ 400 mV single-ended swings and can also provide differential outputs.","PeriodicalId":127467,"journal":{"name":"Symposium 1993 on VLSI Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Symposium 1993 on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1993.920525","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper describes design techniques for multi-GHz digital bipolar circuits that operate with supply voltages as low as 1.5 V. Examples include a multiplexer (MUX), a latch, two exclusive OR (XOR) gates, and a buffer/level shifter, circuits that typically employ stacked differential pairs in conventional ECL and hence do not easily lend themselves to low voltage operation. When implemented in a 1.5 /spl mu/m, 12-GHz bipolar technology, these circuits exhibit a speed comparable with that of their 1.5 V CMOS counterparts designed in a 0.5 /spl mu/m process with a threshold voltage of 0.5 V. These results suggest that, although V/sub BE/ of bipolar transistors does not scale as easily as the threshold voltage of MOS devices, the large bipolar transconductance can be advantageous even in 1.5 V systems. In order to ensure reliable operation, the circuits described herein employ 400 mV single-ended swings and can also provide differential outputs.