Static and dynamic energy losses vs. temperature in different CMOS technologies

Abstract

The aim of this paper is energy dissipation analysis in regards to supply voltage and temperature. The basis of all simulations are 12 different transistors coming from 6 different CMOS technologies (from 180nm to 14nm). Dynamic energy used to switch a gate from one state to the other was evaluated in a range of temperature for different supply voltages. In order to guarantee a realistic timing of control signals a special testing circuit was designed. Change of dynamic energy, as a function of temperature, regardless of supply voltage fits in range of -0.5-7.3%. Static power dissipation, a result of existing leakage currents, rises with temperature. When temperature rises from 20 to 100°C static power multiplicities at least 3 times up to 85 times. When operating with low activity static energy consumptions has higher impact on total energy consumption. In most cases one cannot ignore temperature influence on energy consumption.