A methodology and tool for predictive analysis of configuration bit criticality in SRAM-based FPGAS: Experimental results

Abstract

The interest for SRAM based FPGAs has increased in the last few years in embedded systems, due to cost and reconfigurability motivations. Such systems may operate in harsh environments with for example ionizing radiations, and the application may require a high level of dependability. When the FPGAs are not developed on radiation-hardened technologies, using them in critical applications requires evaluating the consequences of modifications in their configuration. This paper summarizes an approach to evaluate at design time the criticality of the various bits in the configuration file of such a FPGA. Results are given on an Atmel component and comparisons are made with experimental results based on laser fault injections and proton ground tests.