Effective coding for fast redundant adders using the radix-2 digit set {0,1,2,3}

Abstract

We describe a redundant radix-2 representation with digit set {0,1,2,3} and an encoding using three bits per digit, instead of the minimum of two. This representation is then used to implement several adders, having different number of redundant and conventional operands. We show that the resulting adders are faster than those using carry-save representation. The evaluations are done for two libraries of standard cells. These adders have applications where redundant adders (with limited carry propagation) are used. This includes sequential and combinational accumulators and multipliers, CORDIC units, and digit-recurrences for operations such as division and square root. We also evaluate the effect of the proposed adders on the delay and size of a 54-bit tree multiplier.