Soft Errors Reliability Validation and Verification Induced by Signal Event Effect on a High Security Commercial Microprocessor

Abstract

Commercial microprocessor systems in LEO orbit space applications are usually designed for embedded electronic systems, which are executed the complex tasks, such as controller or source management. Hence, there is a clear need for more sophisticated methods for testing and estimating the performances and reliabilities of microprocessor. This paper presents a set of Hardware/Software co-design hardening design techniques to realize the systemic reliability design related to the high security commercial microprocessors with Hercules ARM Cortex-R4F, which are applied to the inter-satellite communication missions. Then these techniques are used to fulfill the radiation harden design from sensitive units of signal event effect for system layer, as well as the latch-up current self-monitoring and recovery design. Ultimately, through the construction of the heavy ion irradiation test evaluation system, the microprocessor being tested is immune to heavy ion induced by single event latch-up and single failure interrupts show a very low response. Thus, the device depended on the radiation harden design is defined as a high reliability and security candidate for digital process system in space applications.