{"title":"Modeling of ESD and EMI problems in split multi-layer power distribution network","authors":"Hwang-Yoon Shim, Jiseong Kim, J. Yook","doi":"10.1109/ISEMC.2003.1236562","DOIUrl":null,"url":null,"abstract":"ESD and EMI problems and their possible solutions are addressed for the multi-layer power distribution network of high-speed digital systems. To prevent system from ESD damage, split I/O port ground with stitching element such as conductor or inductor is proposed, while stitching and decoupling capacitors are proved to be very effective for reducing electromagnetic radiation from the split power plane. Simulations based on 3D-finite difference time domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC mainboard.","PeriodicalId":359422,"journal":{"name":"2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446)","volume":"184 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISEMC.2003.1236562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
ESD and EMI problems and their possible solutions are addressed for the multi-layer power distribution network of high-speed digital systems. To prevent system from ESD damage, split I/O port ground with stitching element such as conductor or inductor is proposed, while stitching and decoupling capacitors are proved to be very effective for reducing electromagnetic radiation from the split power plane. Simulations based on 3D-finite difference time domain (FDTD) method are utilized for the analysis of practical high frequency multi-layered PC mainboard.