Design and implementation of an all-analog fast-fourier transform processor

Abstract

The implementation of a 64-symbol analog, current-mode FFT processor is discussed. An analog FFT would be suitable for combination with an analog decoder in the making of an all-analog communication front-end for OFDM systems. Here the FFT is implemented using a butterfly diagram as the system block diagram; each node in the diagram is implemented using analog circuits. Implementation details, including consideration of the effect of approximation errors and the implementation of a test chip, are discussed.