Jinwook Song, Seungtaek Jeong, Shinyoung Park, Jonghoon J. Kim, Yeonje Cho, Joungho Kim
{"title":"PCB-package to chip wireless power transfer scheme using magnetic-field resonance coupling for high-density 3-D IC","authors":"Jinwook Song, Seungtaek Jeong, Shinyoung Park, Jonghoon J. Kim, Yeonje Cho, Joungho Kim","doi":"10.1109/WPT.2016.7498762","DOIUrl":null,"url":null,"abstract":"In this paper, we propose and demonstrate a chip-level wireless power transfer (WPT) interconnection scheme to reduce power supply interconnections for high-density 3-dimensional integrated circuits (3-D ICs). We fabricated an active chip to design a receiver coil, full-bridge rectifier and DC/DC converter to get DC power from wirelessly delivered AC power from a printed circuit board (PCB) package using the 0.18 μm SK-Hynix CMOS process. The fabricated chip is attached on the transmitter PCB-package with coil-to-coil center alignment for experimental demonstration. An equivalent circuit model of the proposed chip-level WPT interconnection scheme is suggested with analytic equations, and voltage transfer ratio and power transfer efficiency are estimated from the model. The proposed model is verified by comparing Z-parameter results obtained from 3-D EM simulation and measurement of the fabricated test vehicle from 10 MHz to 5 GHz. The voltage transfer ratio and power transfer efficiency of the designed package-to-chip WPT including a 3.3 ohm source resistance is able to reach 0.76 V/V and 34 %, respectively.","PeriodicalId":113182,"journal":{"name":"2016 IEEE Wireless Power Transfer Conference (WPTC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Wireless Power Transfer Conference (WPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WPT.2016.7498762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this paper, we propose and demonstrate a chip-level wireless power transfer (WPT) interconnection scheme to reduce power supply interconnections for high-density 3-dimensional integrated circuits (3-D ICs). We fabricated an active chip to design a receiver coil, full-bridge rectifier and DC/DC converter to get DC power from wirelessly delivered AC power from a printed circuit board (PCB) package using the 0.18 μm SK-Hynix CMOS process. The fabricated chip is attached on the transmitter PCB-package with coil-to-coil center alignment for experimental demonstration. An equivalent circuit model of the proposed chip-level WPT interconnection scheme is suggested with analytic equations, and voltage transfer ratio and power transfer efficiency are estimated from the model. The proposed model is verified by comparing Z-parameter results obtained from 3-D EM simulation and measurement of the fabricated test vehicle from 10 MHz to 5 GHz. The voltage transfer ratio and power transfer efficiency of the designed package-to-chip WPT including a 3.3 ohm source resistance is able to reach 0.76 V/V and 34 %, respectively.