PCB-package to chip wireless power transfer scheme using magnetic-field resonance coupling for high-density 3-D IC

Jinwook Song, Seungtaek Jeong, Shinyoung Park, Jonghoon J. Kim, Yeonje Cho, Joungho Kim
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引用次数: 4

Abstract

In this paper, we propose and demonstrate a chip-level wireless power transfer (WPT) interconnection scheme to reduce power supply interconnections for high-density 3-dimensional integrated circuits (3-D ICs). We fabricated an active chip to design a receiver coil, full-bridge rectifier and DC/DC converter to get DC power from wirelessly delivered AC power from a printed circuit board (PCB) package using the 0.18 μm SK-Hynix CMOS process. The fabricated chip is attached on the transmitter PCB-package with coil-to-coil center alignment for experimental demonstration. An equivalent circuit model of the proposed chip-level WPT interconnection scheme is suggested with analytic equations, and voltage transfer ratio and power transfer efficiency are estimated from the model. The proposed model is verified by comparing Z-parameter results obtained from 3-D EM simulation and measurement of the fabricated test vehicle from 10 MHz to 5 GHz. The voltage transfer ratio and power transfer efficiency of the designed package-to-chip WPT including a 3.3 ohm source resistance is able to reach 0.76 V/V and 34 %, respectively.
高密度三维集成电路中采用磁场共振耦合的pcb封装到芯片的无线电力传输方案
在本文中,我们提出并演示了一种芯片级无线电力传输(WPT)互连方案,以减少高密度三维集成电路(3-D ic)的电源互连。我们制作了一个有源芯片来设计接收线圈、全桥整流器和DC/DC转换器,利用0.18 μm SK-Hynix CMOS工艺从印刷电路板(PCB)封装中无线传输的交流电源获得直流电源。制作的芯片以线圈对线圈中心对准的方式贴在发射器pcb封装上进行实验演示。利用解析方程建立了芯片级WPT互连方案的等效电路模型,并根据该模型估算了电压传递比和功率传输效率。通过将三维电磁仿真结果与整车在10 MHz ~ 5 GHz范围内的测量结果进行对比,验证了所提模型的正确性。采用3.3欧姆源电阻设计的WPT,其电压传输比和功率传输效率分别达到0.76 V/V和34%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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