Performance evaluation of a DVD processor using transaction level models

Abstract

Modern dav DVD processors are classic e.ram& of system-on-chip (SoC) devigns that grew in an incremental fashion over a long period of development. Performance evolnation of s7rch systems consisting of mnltiple heterogeneous processors at the architectural level is a/airl,v complu and time-consuming efort. The traditional approacli qfwing cycle accurate simulotors is slow in sim~ilution speed and is d;ffirzilt in terms ofintegrating tlie SoC model. Al.so, in mony insiunces, siich models are not necessau?, since certain architectriral .fC;utzires snch as the processor interconnection and ronting nehvorks or memou?, system inierfbces are the ones to he determined in ear& design stage.x In this paper. u’e look at performance evaluation of such an SoC for DVD processing hv means of transaction level models zising Sy.7-