A Low 1/f Noise CMOS Low-Dropout Regulator with Current-Mode Feedback Buffer Amplifier

Abstract

Low-noise, low-dropout (LN-LDO) regulators are critical for supply regulation of deep-submicron analog baseband and RF system-on-chip designs. A low 1/f noise LDO regulator utilizing a chopper stabilized error amplifier is presented. In order to achieve fast response during load transients, a current-mode feedback amplifier (CFA) with an asymmetrical input pair is designed as a second stage. With chopping frequencies up to 1MHz, an output noise spectral density of 32nV/radicHz and PSR of 38dB is achieved at 100kHz. Compared to an equivalent noise density static regulator, the error amplifier silicon area is reduced by 75%. With the current-mode feedback second stage buffer, settling time is reduced by 60% in comparison to an equivalent power consumption voltage mode buffer, achieving 0.6musec settling time for a 50mA load step. The LN-LDO is designed and fabricated on a 0.25 mum CMOS process with five layers of metal, occupying 0.88mm2