{"title":"A novel 174-240 MHz two gain mode LNA for DAB applications","authors":"Jiang-Hong Han, Zhigong Wang, Xu Jian","doi":"10.1109/ICCT.2010.5688956","DOIUrl":null,"url":null,"abstract":"This paper presents a novel two gain mode LNA for DAB band III (174–240MHz) applications. The combination of a broadband LNA and a transmission gate realize a new two gain mode topology. In the high gain mode, an inductor-less broadband LNA employing noise-cancelling technique was used, which can easily meet the requirements of low noise, high gain, and input impedance. In the low gain mode, the LNA is bypassed and powered down, and the input signal directly reaches the output through the transmission gate. In this way, a better linearity can be achieved. Designed with the SMIC 0.18-µm CMOS process, the simulation results exhibits a maximum gain of 15 dB, a minimum gain of −1.6dB. Also, the LNA has excellent noise performance at high gain mode; A noise figure of 2.1dB is achieved in this work. Especially, at low gain mode the input 1-dB compression point is 9.5 dBm.","PeriodicalId":253478,"journal":{"name":"2010 IEEE 12th International Conference on Communication Technology","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE 12th International Conference on Communication Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCT.2010.5688956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents a novel two gain mode LNA for DAB band III (174–240MHz) applications. The combination of a broadband LNA and a transmission gate realize a new two gain mode topology. In the high gain mode, an inductor-less broadband LNA employing noise-cancelling technique was used, which can easily meet the requirements of low noise, high gain, and input impedance. In the low gain mode, the LNA is bypassed and powered down, and the input signal directly reaches the output through the transmission gate. In this way, a better linearity can be achieved. Designed with the SMIC 0.18-µm CMOS process, the simulation results exhibits a maximum gain of 15 dB, a minimum gain of −1.6dB. Also, the LNA has excellent noise performance at high gain mode; A noise figure of 2.1dB is achieved in this work. Especially, at low gain mode the input 1-dB compression point is 9.5 dBm.