Thermal noise analysis of multi-bit SC gain-stages for low-voltage high-resolution pipeline ADC design

Abstract

Analysis of thermal noise in switched-capacitor multi-bit gain-stages used in low-voltage high-resolution pipeline analog-to-digital converters is presented. The analytical expression obtained for the input referred noise power, which should be considered in the design procedure, is general for any number of bits being resolved and shows that the noise power is decreased when more bits are resolved in the stage.