A vector dataflow architecture

Abstract

The author presents a vector data-flow (VDF) architecture which is based on the following design philosophy: increasing data granularity, whenever possible, by grouping together ordered sequences of data into logical structures called vectors; increasing node granularity by grouping together nodes, according to a partitioning algorithm, to form logical structures called tasks; and supporting efficient execution of both vector and task structures by designing a dedicated hardware level. The VDF processor based on this scheme is described, and simulation results are presented.<>