Implementation of Low complexity inter prediction for IoT systems

Abstract

In this paper, we presents efficient hardware design of inter picture prediction in the slim - high efficient video coding (HEVC). Compared with fully implemented HM10.0, our compression performance of inter prediction hardware block is decreased due to simplification. However our target is Real-time Encoder suitable for IoT, so our inter prediction block is small and fast. Also the verification of the inter prediction design is conducted using the ZYNQ and Virtex7.