{"title":"IP Reuse in System on a Chip Design","authors":"R. Camposano, W. Savage, J. Chilton","doi":"10.1109/VLSID.2000.10016","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":382435,"journal":{"name":"VLSI design (Print)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI design (Print)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2000.10016","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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