{"title":"Suppression of the Reverse Short Channel Effect in (Sub-)0.25um nMOSFETs using elevated S/D structures","authors":"D. Schumann, R. Krieg, H. Schaefer, U. Schwalke","doi":"10.1109/ESSDERC.1997.194441","DOIUrl":null,"url":null,"abstract":"nMOSFETs with elevated S/D structures were fabricated by selective epitaxial growth of in-situ doped S/D regions. Variation of the total thermal budget allowed the optimization of outdiffusion from the epi-Si with respect to the realization of shallow junctions. For all process conditions investigated the Reverse Short Channel Effect (RSCE) was completely suppressed indicating that the RSCE observed for conventional processed nMOSFETs has to be attributed to S/D implantation. The process presented allows a realization of typical advantages for elevated S/D structures with an optimized Vth roll-off.","PeriodicalId":424167,"journal":{"name":"27th European Solid-State Device Research Conference","volume":"316 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th European Solid-State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.1997.194441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
nMOSFETs with elevated S/D structures were fabricated by selective epitaxial growth of in-situ doped S/D regions. Variation of the total thermal budget allowed the optimization of outdiffusion from the epi-Si with respect to the realization of shallow junctions. For all process conditions investigated the Reverse Short Channel Effect (RSCE) was completely suppressed indicating that the RSCE observed for conventional processed nMOSFETs has to be attributed to S/D implantation. The process presented allows a realization of typical advantages for elevated S/D structures with an optimized Vth roll-off.