Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG Signals

Abstract

This work presents the design space exploration and optimization of four different single-stage operational transconductance amplifiers (OTA) to implement a low-noise amplifier (LNA) for electrocardiogram signals in 65-nm CMOS. First, the tradeoffs between power consumption and input-referred noise (IRN), gain, and area of the four topologies are determined using AIDASoft, a state-of-the-art multi-objective multi-constraint circuit-level electronic design automation tool. The OTAs are optimized with populations of 1024 elements through 500 generations. The OTA topology with better power vs IRN tradeoff is chosen as as the first stage for the LNA for low input noise; and to increase the gain in the second stage, the topology showing better gain versus power tradeoff is selected. Having selected the topologies of the OTAs, the ultra-low-power LNA with a capacitive feedback structure is optimized, resulting in 1019 designs with performance ranging from 3-to-95 nW consumption with a power supply of 0.6 V and IRNs ranging from 10-to-2.3 μV. From these, three solutions showing the different tradeoffs are presented, one with minimum power, a second with minimum IRN and a balanced one. This last solution consumes 10.9 nW, achieving an IRN of 5.1 μV, gain 45.4 dB, with the low cutoff frequency is set at 1.4 Hz, and the high cutoff frequency at 160 Hz.