Current enhanced PNPN tunnel field-effect transistor with L-shaped gate

P. Xu, Xinnan Lin
{"title":"Current enhanced PNPN tunnel field-effect transistor with L-shaped gate","authors":"P. Xu, Xinnan Lin","doi":"10.1109/EDSSC.2017.8126402","DOIUrl":null,"url":null,"abstract":"In this paper, a new PNPN tunnel field-effect transistor with L-shaped gate (LG-PNPN TFET) is proposed and investigated by numerical device simulator bringing significant on-state current enhancement. Higher drive current is achieved at VDD = 1.0V than traditional PNPN TFET because of both the line and point tunneling between the source and N+ pocket. Key parameters like the pocket width and doping concentration are further studied for device performance optimization.","PeriodicalId":163598,"journal":{"name":"2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2017.8126402","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

In this paper, a new PNPN tunnel field-effect transistor with L-shaped gate (LG-PNPN TFET) is proposed and investigated by numerical device simulator bringing significant on-state current enhancement. Higher drive current is achieved at VDD = 1.0V than traditional PNPN TFET because of both the line and point tunneling between the source and N+ pocket. Key parameters like the pocket width and doping concentration are further studied for device performance optimization.
l型栅极的电流增强型PNPN隧道场效应晶体管
本文提出了一种新型的l型栅极PNPN隧道场效应晶体管(LG-PNPN TFET),并利用数值器件模拟器对其进行了研究。在VDD = 1.0V时,由于源与N+口袋之间的线隧穿和点隧穿,使得驱动电流比传统的PNPN TFET更高。进一步研究口袋宽度、掺杂浓度等关键参数,优化器件性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信