Chao Yang, Xiaoming Liu, Wandong Tao, Yuekang Guo, J. Jin
{"title":"A 77 GHz 4-Way Power Amplifier with 20.2 dBm Output Power in 40 nm CMOS","authors":"Chao Yang, Xiaoming Liu, Wandong Tao, Yuekang Guo, J. Jin","doi":"10.1109/IWS55252.2022.9977554","DOIUrl":null,"url":null,"abstract":"This paper presents a fully integrated 77 GHz power amplifier (PA) in a 40 nm bulk CMOS process for automotive radar. A 4-way series-parallel power combiner using the distributed active transformer (DAT) technique is proposed to increase output power. The DAT technique reduces the loss and improved the phase/gain balance between paths. To achieve the optimal output power and efficiency, load pull matching is performed using the DAT and the connection lines. At 77 GHz, this proposed two-stage PA achieves a saturated output power $(\\mathbf{P}_{\\mathbf{sat}})$ of 20.4 dBm and a peak power-added efficiency $(\\mathbf{PAE}_{\\max})$ of 18%. It demonstrates a bandwidth of 12 GHz with a peak power gain of 12dB. The core area of the PAis 0.15 mm2 and the working supply is 1.1V.","PeriodicalId":126964,"journal":{"name":"2022 IEEE MTT-S International Wireless Symposium (IWS)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE MTT-S International Wireless Symposium (IWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWS55252.2022.9977554","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a fully integrated 77 GHz power amplifier (PA) in a 40 nm bulk CMOS process for automotive radar. A 4-way series-parallel power combiner using the distributed active transformer (DAT) technique is proposed to increase output power. The DAT technique reduces the loss and improved the phase/gain balance between paths. To achieve the optimal output power and efficiency, load pull matching is performed using the DAT and the connection lines. At 77 GHz, this proposed two-stage PA achieves a saturated output power $(\mathbf{P}_{\mathbf{sat}})$ of 20.4 dBm and a peak power-added efficiency $(\mathbf{PAE}_{\max})$ of 18%. It demonstrates a bandwidth of 12 GHz with a peak power gain of 12dB. The core area of the PAis 0.15 mm2 and the working supply is 1.1V.