Patrick J. Bollinger, Frank X. Li, Eric W. MacDonald
{"title":"A Novel Encryption Methodology with Prime Factorization through Reversible Logic Gates","authors":"Patrick J. Bollinger, Frank X. Li, Eric W. MacDonald","doi":"10.1109/NAECON46414.2019.9057958","DOIUrl":null,"url":null,"abstract":"this paper is to determine the feasibility of using hardware to perform prime factorization of a semi-prime number. The application of this research can primarily impact the field of cybersecurity. By deconstructing the view of digital logic gates being one-way functions, we propose to reverse the typical flow of information. The reversible logic gates are developed with Python codes, larger reversible digital circuits are constructed until a full array multiplier is ready for testing. An analysis is performed with a semi-prime number of 4 binary digits up to 1024 binary digits long. Although the reversible logic gates are able to deduce new information, it is not enough information to perform the prime factorization of a semi-prime number. Based on these results, we conclude that more information needs to be created for reversible logic gates to be a feasible method of prime factorization. Further research can be performed, such as defining more relationships between bits, and this research can apply the reversible logic gates to other digital circuits.","PeriodicalId":193529,"journal":{"name":"2019 IEEE National Aerospace and Electronics Conference (NAECON)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE National Aerospace and Electronics Conference (NAECON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON46414.2019.9057958","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
this paper is to determine the feasibility of using hardware to perform prime factorization of a semi-prime number. The application of this research can primarily impact the field of cybersecurity. By deconstructing the view of digital logic gates being one-way functions, we propose to reverse the typical flow of information. The reversible logic gates are developed with Python codes, larger reversible digital circuits are constructed until a full array multiplier is ready for testing. An analysis is performed with a semi-prime number of 4 binary digits up to 1024 binary digits long. Although the reversible logic gates are able to deduce new information, it is not enough information to perform the prime factorization of a semi-prime number. Based on these results, we conclude that more information needs to be created for reversible logic gates to be a feasible method of prime factorization. Further research can be performed, such as defining more relationships between bits, and this research can apply the reversible logic gates to other digital circuits.