A Fully-Integrated 0.11μm CMOS Digital Low-IF DVB-S2 Satellite TV Dual Tuner SOC

Abstract

A digital low-IF fully-integrated dual tuner for DVB-S2 satellite TV applications was realized in 0.11μm CMOS. It provides baseband digital I/Q outputs for a demodulator-on-host back-end processor. A wide bandwidth ring oscillator based frequency synthesizer having a large frequency step was used to down-convert a cluster of channels to a sliding low-IF frequency, while the second down-conversion to baseband was performed in the digital domain. The low-IF architecture allows a discrete AGC loop, while avoiding 1/f noise and DC offset issues. Eliminating the VCO tank inductors minimizes frequency pulling and parasitic coupling to front-end LNA, allowing the integration of a large digital core on the same die with the sensitive RF front-end.