High-Performance Hardware Implementation of CRYSTALS-Dilithium

Luke Beckwith, D. Nguyen, K. Gaj
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引用次数: 25

Abstract

Many currently deployed public-key cryptosystems are based on the difficulty of the discrete logarithm and integer factorization problems. However, given an adequately sized quantum computer, these problems can be solved in polynomial time as a function of the key size. Due to the future threat of quantum computing to current cryptographic standards, alternative algorithms that remain secure under quantum computing are being evaluated for future use. One such algorithm is CRYSTALS-Dilithium, a lattice-based digital signature scheme, which is a finalist in the NIST Post Quantum Cryptography (PQC) competition. As a part of this evaluation, high-performance implementations of these algorithms must be investigated. This work presents a high-performance implementation of CRYSTALS-Dilithium targeting FPGAs. In particular, we present a design that achieves the best latency for an FPGA implementation to date. We also compare our results with the most-relevant previous work on hardware implementations of NIST Round 3 post-quantum digital signature candidates.
晶体-二锂的高性能硬件实现
目前部署的许多公钥密码系统都是基于离散对数和整数分解问题的难度。然而,给定一个足够大小的量子计算机,这些问题可以在多项式时间内作为密钥大小的函数来解决。由于量子计算对当前加密标准的未来威胁,正在评估在量子计算下保持安全的替代算法以供未来使用。其中一种算法是CRYSTALS-Dilithium,这是一种基于格子的数字签名方案,它是NIST后量子密码学(PQC)竞赛的决赛选手。作为评估的一部分,必须研究这些算法的高性能实现。这项工作提出了一个高性能的晶体-二锂靶向fpga的实现。特别是,我们提出了一种设计,可以实现迄今为止FPGA实现的最佳延迟。我们还将我们的结果与NIST第3轮后量子数字签名候选者的硬件实现的最相关的先前工作进行了比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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