Integrated Three-Level Flying Capacitor DC-DC Buck Converter for CubeSat Applications

2023 Argentine Conference on Electronics (CAE) Pub Date : 2023-03-09 DOI:10.1109/CAE56623.2023.10087013

Jorge Marin, J. Gak, A. Cortés, Nicolás Calarco, A. Oliva, E. Lindstrom, M. Miguez, Alfredo Falcon, Niria Osterman, C. Rojas

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引用次数: 2

Abstract

In this work, the design, simulation and implementation of a DC-DC buck converter based on the Three-level Flying Capacitor Converter architecture for space applications, namely CubeSat systems, using the Skywater 130nm CMOS technology is presented. The power circuits are fully integrated on-chip, including the power MOSFETs and the gate drivers, to obtain an efficient and compact implementation. This versatile power electronics building block, is also a contribution to the open source IC design community. Additionally, tests structures for the flying capacitor and the output filter inductors are included to characterize the technology passive. The active area of the dual-core circuit (including power switches and drivers) occupies less than 1mm2 of silicon in this process. Simulated results shows a peak efficiency of 87% at 140mA load current for the single core converter, and a peak efficiency of 93.3% at 555mA load current for the dual-core converter, at 1MHz switching frequency. It also shows a 85% peak efficiency for full on-chip flying capacitor single-core implementation at 10MHz operation.

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用于立方体卫星的集成三电平飞电容DC-DC降压变换器

在这项工作中，提出了一种基于三电平飞电容变换器架构的DC-DC降压变换器的设计、仿真和实现，用于空间应用，即立方体卫星系统，采用Skywater 130纳米CMOS技术。功率电路完全集成在片上，包括功率mosfet和栅极驱动器，以获得高效和紧凑的实现。这个多功能的电力电子构建块，也是对开源IC设计界的贡献。此外，还包括飞行电容器和输出滤波电感器的测试结构，以表征该技术的无源性。在此工艺中，双核电路的有源区域(包括电源开关和驱动器)占用的硅小于1mm2。仿真结果表明，单芯变换器在140mA负载电流下的峰值效率为87%，双芯变换器在1MHz开关频率下，在555mA负载电流下的峰值效率为93.3%。它还显示，在10MHz操作下，全片上飞行电容器单核实现的峰值效率为85%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2023 Argentine Conference on Electronics (CAE)

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