Nachiket V. Desai, H. Krishnamurthy, William J. Lambert, Jingshu Yu, H. Then, N. Butzen, Sheldon Weng, C. Schaef, N. Nidhi, M. Radosavljevic, J. Rode, J. Sandford, K. Radhakrishnan, K. Ravichandran, B. Sell, J. Tschanz, V. De
{"title":"A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors","authors":"Nachiket V. Desai, H. Krishnamurthy, William J. Lambert, Jingshu Yu, H. Then, N. Butzen, Sheldon Weng, C. Schaef, N. Nidhi, M. Radosavljevic, J. Rode, J. Sandford, K. Radhakrishnan, K. Ravichandran, B. Sell, J. Tschanz, V. De","doi":"10.23919/VLSICircuits52068.2021.9492350","DOIUrl":null,"url":null,"abstract":"A 5V-input, high-frequency, high-density (9A/mm2) buck converter featuring a low-voltage GaN power transistor (with 5-10× better FoM than Si) with on-die gate clamps, integrated with a CMOS companion die in 4mm × 4mm package, achieves 94.2% peak efficiency for 5Vin/1Vout at 3MHz switching frequency with a 40nH inductor.","PeriodicalId":106356,"journal":{"name":"2021 Symposium on VLSI Circuits","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSICircuits52068.2021.9492350","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A 5V-input, high-frequency, high-density (9A/mm2) buck converter featuring a low-voltage GaN power transistor (with 5-10× better FoM than Si) with on-die gate clamps, integrated with a CMOS companion die in 4mm × 4mm package, achieves 94.2% peak efficiency for 5Vin/1Vout at 3MHz switching frequency with a 40nH inductor.