Extensible Fault Secure Sift-Out Technique for FPGA-based Applications

Abstract

This paper describes a fault secure Restoring Organ (RO) for a fault-tolerant Sift-Out architecture with n identical modules. All n modules as well as the RO are implemented on a SRAM-based FPGA. Whether a module is affected by a temporary (Single Event Upset) or a permanent fault, it is proven that the RO can detect and recover from this fault. Furthermore, the RO is fault secure; when it is itself affected by a temporary or a permanent fault, its output indicates that it is erroneous to prevent the propagation of incorrect data. Finally, the RO is extensible; it is shown how it can accommodate n modules for n≥4. The design is successfully synthesized and implemented on a Xilinx XC7VX485TFFG1157-1 device.