Boost logic : a high speed energy recovery circuit family

Abstract

In this paper, we propose boost logic, a logic family which relies on voltage scaling, gate overdrive, and energy recovery techniques to achieve high energy efficiency at frequencies in the GHz range. The key feature of our design is the use of an energy recovering "boost" stage to provide an efficient gate overdrive to a highly voltage-scaled logic at near-threshold supply voltage. We have evaluated our logic family using simulation results from an 8-bit carry-save multiplier in a 0.13 /spl mu/m CMOS process with V/sub th/ = 340 mV at 1.4 GHz and a 1.1 V supply voltage, the boost multiplier dissipates 3.44 pJ per computation, achieving 57% energy savings with respect to its static CMOS counterpart. Using low V/sub th/ devices, boost logic has been verified to operate at 2 GHz with a 1.2 V voltage supply and 3.76 pJ energy dissipation per cycle.