K. O, H. Lee, R. Reif, W. Frank, W. Metz, T. Gillis
{"title":"A bipolar structure with semi-dielectric device isolation by selective epitaxial growth","authors":"K. O, H. Lee, R. Reif, W. Frank, W. Metz, T. Gillis","doi":"10.1109/BIPOL.1988.51089","DOIUrl":null,"url":null,"abstract":"A bipolar structure with an estimated f/sub T/ of 5 GHz was fabricated on a selective epitaxial layer. A shallow buried layer (0.25 mu m approximately 0.50 mu m) was formed by diffusing arsenic atoms from an arsenic-implanted polysilicon layer. The polysilicon layer was removed by converting it to oxide and etching the oxide. The defective regions at the edges of the selective epitaxial layer were removed by a plasma etch step to form defect-free base-collector junctions; the junctions can be placed less than 2 mu m from the edges without degrading the device characteristics. Using the selective epitaxial growth, LOCOS isolation and the shallow buried layer, semi-dielectric transistor isolation was achieved.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"346 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.1988.51089","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
A bipolar structure with an estimated f/sub T/ of 5 GHz was fabricated on a selective epitaxial layer. A shallow buried layer (0.25 mu m approximately 0.50 mu m) was formed by diffusing arsenic atoms from an arsenic-implanted polysilicon layer. The polysilicon layer was removed by converting it to oxide and etching the oxide. The defective regions at the edges of the selective epitaxial layer were removed by a plasma etch step to form defect-free base-collector junctions; the junctions can be placed less than 2 mu m from the edges without degrading the device characteristics. Using the selective epitaxial growth, LOCOS isolation and the shallow buried layer, semi-dielectric transistor isolation was achieved.<>