Switched Capacitor Based Area Efficient Voltage Quadruple for High Pumping Efficiency

Abstract

This paper proposes a design of switched capacitor-based voltage quadruple circuit that can be used to generate on-chip high voltage. The circuit consist of two-phase clock signals, flying capacitors and Charge Transfer Switches (CTS). Proposed circuit uses 30% less flying capacitor as compare to conventional architectures. This circuit shows the voltage efficiency of 95% for no current load condition and uses total 0.015 mm2chip area. Circuit is design and implemented using in 90nm triple well technology using 5V capable transistors.