{"title":"Optoelectronic Chip for the Implementation of Back Error Propagation","authors":"H. Li, J. Drolet, D. Psaltis, M. Handschy","doi":"10.1109/LEOSST.1992.697512","DOIUrl":null,"url":null,"abstract":"We present a CMOS silicon chip that optically implements the back error propagation (BEP) algorithm [1] of a two layer neural network. The chip has eight units (or \"neurons\") on a area of approximately 2x2 mm. Each unit consists of a phototransistor as the detector, a modulator pad for light modulation, sample-and-hold circuits, and additional circuits necessary to perform the BEP algorithm.","PeriodicalId":355341,"journal":{"name":"Summer Topical Meeting Digest on Broadband Analog and Digital Optoelectronics, Optical Multiple Access Networks, Integrated Optoelectronics, Smart Pixels","volume":"61 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Summer Topical Meeting Digest on Broadband Analog and Digital Optoelectronics, Optical Multiple Access Networks, Integrated Optoelectronics, Smart Pixels","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LEOSST.1992.697512","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
We present a CMOS silicon chip that optically implements the back error propagation (BEP) algorithm [1] of a two layer neural network. The chip has eight units (or "neurons") on a area of approximately 2x2 mm. Each unit consists of a phototransistor as the detector, a modulator pad for light modulation, sample-and-hold circuits, and additional circuits necessary to perform the BEP algorithm.