Investigation of interconnect parameters for high speed microelectronics devices applications

V. Tomar, S.K. Gupta, S. Yadav, D. Gautam
{"title":"Investigation of interconnect parameters for high speed microelectronics devices applications","authors":"V. Tomar, S.K. Gupta, S. Yadav, D. Gautam","doi":"10.1109/ELECTRO.2009.5441149","DOIUrl":null,"url":null,"abstract":"The present paper reports the optimization and analysis of the interconnect parameters such as ground and coupling capacitance which play very important roll in the design and development of future microelectronics devices. Here, we have optimized ground capacitance along with the variation in dielectric thickness and interwire spacing respectively. It has been observed that ground capacitance increases with increase in interwire spacing. It is also find out that the ground capacitance decreases with simultaneously increase in dielectric thickness.","PeriodicalId":149384,"journal":{"name":"2009 International Conference on Emerging Trends in Electronic and Photonic Devices & Systems","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Emerging Trends in Electronic and Photonic Devices & Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ELECTRO.2009.5441149","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The present paper reports the optimization and analysis of the interconnect parameters such as ground and coupling capacitance which play very important roll in the design and development of future microelectronics devices. Here, we have optimized ground capacitance along with the variation in dielectric thickness and interwire spacing respectively. It has been observed that ground capacitance increases with increase in interwire spacing. It is also find out that the ground capacitance decreases with simultaneously increase in dielectric thickness.
高速微电子器件互连参数研究
本文报道了在未来微电子器件的设计和开发中起重要作用的接地和耦合电容等互连参数的优化和分析。在这里,我们分别优化了地电容随介质厚度和线间距的变化。接地电容随线间距的增大而增大。同时还发现,接地电容随介质厚度的增加而减小。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信