1.2-V 5.8-GHz 90nm CMOS RF power amplifier parameter enhancement techniques

Abstract

In this study, two parameter enhancement techniques, Transformer-based power combining and Diode linearization, which can improve the performance of a power amplifier, are implemented on a Class AB PA and then combined to determine their effectiveness. Using a 1.2-V 90nm CMOS process, a test chip containing the power combining network is fabricated and tested. The obtained results show that the power combining technique increases POUT by 13dB in exchange of 2X die area increase. The diode linearizer improves 1-dB input compression point by 1.3dB, IM3 up to 5dB and APC first offset frequency WiMAX specification by 10dB. These are all attained in exchange of a 1.1dB insertion loss.