Congestion-Aware Adaptive Routing in 2D-Mesh Multicores

D. Avresky, Fabien Chaix, M. Nicolaidis
{"title":"Congestion-Aware Adaptive Routing in 2D-Mesh Multicores","authors":"D. Avresky, Fabien Chaix, M. Nicolaidis","doi":"10.1109/NCA.2014.13","DOIUrl":null,"url":null,"abstract":"New CMOS processes offer cheaper but less reliable transistors. This trend foreshadows the apparition of processors consisting of hundreds and thousands of cores prone to defects. In this context, the performance of the core interconnect under faults will be critical. In this work, we propose the combination of a novel adaptive routing algorithm and several related router mechanisms, which firstly ensure message transfers under transient and permanent faults and second adapt to congestion in order to improve the interconnect performances. In effect, the widespread 2D mesh topology offers a high redundancy of routes. Hence, a fault-tolerant congestion-aware routing algorithm is able to improve substantially the interconnect efficiency under degraded conditions. Besides, the Virtual Channel allocation is optimized for performance, and a message truncation mechanism is added to cope with dynamic permanent and transient faults.","PeriodicalId":399462,"journal":{"name":"2014 IEEE 13th International Symposium on Network Computing and Applications","volume":"111 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE 13th International Symposium on Network Computing and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NCA.2014.13","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

New CMOS processes offer cheaper but less reliable transistors. This trend foreshadows the apparition of processors consisting of hundreds and thousands of cores prone to defects. In this context, the performance of the core interconnect under faults will be critical. In this work, we propose the combination of a novel adaptive routing algorithm and several related router mechanisms, which firstly ensure message transfers under transient and permanent faults and second adapt to congestion in order to improve the interconnect performances. In effect, the widespread 2D mesh topology offers a high redundancy of routes. Hence, a fault-tolerant congestion-aware routing algorithm is able to improve substantially the interconnect efficiency under degraded conditions. Besides, the Virtual Channel allocation is optimized for performance, and a message truncation mechanism is added to cope with dynamic permanent and transient faults.
二维网格多核中的拥塞感知自适应路由
新的CMOS工艺提供了更便宜但更不可靠的晶体管。这一趋势预示着由成百上千个内核组成的处理器将会出现缺陷。在这种情况下,核心互连在故障下的性能将是至关重要的。在这项工作中,我们提出了一种新的自适应路由算法和几种相关的路由机制相结合,首先确保在瞬态和永久故障下的消息传输,其次适应拥塞,以提高互连性能。实际上,广泛的二维网格拓扑结构提供了高冗余的路由。因此,容错拥塞感知路由算法能够在降级条件下大幅提高互连效率。此外,对虚拟通道的分配进行了性能优化,并增加了消息截断机制以应对动态永久和瞬时故障。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信