A 16-channel digital TDC chip

P. Bailly, J. Chauveau, J. Genat, J. Huppert, H. Lebbolo, L. Roos, Zhang Bo
{"title":"A 16-channel digital TDC chip","authors":"P. Bailly, J. Chauveau, J. Genat, J. Huppert, H. Lebbolo, L. Roos, Zhang Bo","doi":"10.1109/NSSMIC.1998.775181","DOIUrl":null,"url":null,"abstract":"A 16-channel digital TDC chip has been built for the DIRC Cerenkov counter of the BaBar experiment at the SLAC B-factory (Stanford, USA). The binning is 0.5 ns and the full-scale 32 microseconds. The data driven architecture integrates channel buffering and selective readout of data falling within a programmable time window. The linearity is better than 80 ps rms on 90% of the production parts.","PeriodicalId":129202,"journal":{"name":"1998 IEEE Nuclear Science Symposium Conference Record. 1998 IEEE Nuclear Science Symposium and Medical Imaging Conference (Cat. No.98CH36255)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 IEEE Nuclear Science Symposium Conference Record. 1998 IEEE Nuclear Science Symposium and Medical Imaging Conference (Cat. No.98CH36255)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NSSMIC.1998.775181","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13

Abstract

A 16-channel digital TDC chip has been built for the DIRC Cerenkov counter of the BaBar experiment at the SLAC B-factory (Stanford, USA). The binning is 0.5 ns and the full-scale 32 microseconds. The data driven architecture integrates channel buffering and selective readout of data falling within a programmable time window. The linearity is better than 80 ps rms on 90% of the production parts.
一个16通道数字TDC芯片
在SLAC b工厂(Stanford, USA)为BaBar实验的DIRC Cerenkov计数器构建了一个16通道数字TDC芯片。起始为0.5纳秒,满量程为32微秒。数据驱动的体系结构集成了通道缓冲和可编程时间窗口内数据的选择性读出。在90%的生产零件上,线性度优于80 ps rms。
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