A New Kind of Cache Coherence Protocol with SC-Cache for Multiprocessor

Abstract

Aiming at the Cache coherence problem that brings by multiple processor cores of CMP(Chip multiprocessors) sharing the single memory space, this paper introduces a new kind of Cache coherence--CSC(Coherence with SC-Cache) based on write-through and write-back mechanism, which contains SC-Cache (Shared Coherence Cache) module. Experiments show that the protocol reduces the number of bus transactions, to a certain extent improves the efficiency of processor data access.