Reconfigurable Galois Field multiplier

Abstract

Galois Field has received a lot of attention because of their important and particular applications in cryptography, channel coding, etc. This paper presents the Reconfigurable Galois Field multiplier used to calculate the Galois field multiplication of different lengths which consists of AND gates and special cells. The special cell makes multiplier architecture easier to extend and calculate arbitrarily length multiplication. The Reconfigurable Galois Field multiplier only uses combinational logic circuits which have been implemented on Xilinx FPGA. The results prove that this work has better performances than other previous similar works.