Prediction of the robustness of integrated circuits against EFT/BURST

Abstract

Ensuring product immunity against transient disturbances, that are present in the electromagnetic environment, is important to guarantee the electromagnetic compatibility (EMC) of an electronic system. Therefore, being able to predict whether a transient event interferes with the normal functionality of the electronic system and causes a malfunction, or even destruction, can help to define the right protection during the concept and development phase of the system. In this paper, a methodology predicated on the exploitation of different techniques to perform mathematical calculations and simulations that are based on models of electrical fast transients (EFT) together with the corresponding model of the real test setup is presented. This methodology can be used to estimate the interference of an integrated circuit (IC) by a transient event during the test and to predict to what extent the IC will survive sustain without getting damaged. This method can also be used to determine the optimal external and internal protection structure for an electronic system against any kind of transient disturbance.