R. Bhatia, S. Jalan, S. Chakraborty, S. Yoon, S. Nuttinck, S. Pinel, D. Nobbe, J. Laskar
{"title":"Potential of 0.5 /spl mu/m SOI CMOS process towards low voltage, low power RF applications in multigigahertz regime","authors":"R. Bhatia, S. Jalan, S. Chakraborty, S. Yoon, S. Nuttinck, S. Pinel, D. Nobbe, J. Laskar","doi":"10.1109/RAWCON.2003.1227953","DOIUrl":null,"url":null,"abstract":"Silicon on insulator (SOI) has emerged as a strong contender for low power RF applications. This paper demonstrates the potential of SOI technology towards the development of next generation RF front ends. The capabilities of a 0.5 /spl mu/m SOI technology are illustrated by the design and fabrication of a low supply voltage, low power VCO operating at 1.8 GHz. The VCO operates with supply voltage as low as 1 V. The tuning range was measured to be 14% and the measured phase noise was -117.5 dBc/Hz at an offset frequency of 1 MHz from the 1.77 GHz carrier. The VCO and the buffers consume 14.7 mW power from a 1.5 V supply. We also demonstrate the development, fabrication and measurement of anti-parallel dioxide pair (APDP) structures towards subharmonic mixers in this technology.","PeriodicalId":177645,"journal":{"name":"Radio and Wireless Conference, 2003. RAWCON '03. Proceedings","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Radio and Wireless Conference, 2003. RAWCON '03. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RAWCON.2003.1227953","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Silicon on insulator (SOI) has emerged as a strong contender for low power RF applications. This paper demonstrates the potential of SOI technology towards the development of next generation RF front ends. The capabilities of a 0.5 /spl mu/m SOI technology are illustrated by the design and fabrication of a low supply voltage, low power VCO operating at 1.8 GHz. The VCO operates with supply voltage as low as 1 V. The tuning range was measured to be 14% and the measured phase noise was -117.5 dBc/Hz at an offset frequency of 1 MHz from the 1.77 GHz carrier. The VCO and the buffers consume 14.7 mW power from a 1.5 V supply. We also demonstrate the development, fabrication and measurement of anti-parallel dioxide pair (APDP) structures towards subharmonic mixers in this technology.